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mc144110 package information p suffix plastic dip case 707 package information dw suffix sog package case 751d ordering information device package mc144110p plastic dip mc144110dw sog mc144111p plastic dip MC144111DW sog package information p suffix plastic dip case 646 package information dw suffix sog package case 751g mc144111 freescale semiconductor wireless rf product device data 3-45 mc144110 freescale semiconductor technical data mc144110/d rev. 2, 1/2005 1 introduction the mc144110 and mc144111 are low-cost 6-bit d/a converters with serial in terface ports to provide communication with cmos microprocessors and microcomputers. the mc144110 contains six static d/a converters; the mc144111 c ontains four converters. due to a unique feature of these dacs, the user is permitted easy scaling of the analog outputs of a system. over a 5 to 15 v supply range, these dacs may be directly interfaced to cmos mpus operating at 5 v. ? direct r-2r network outputs ? buffered emitter-follower outputs ? serial data input ? digital data output facilitates cascading ? direct interface to cmos p ? wide operating voltage range: 4.5 to 15 v ? wide operating temperature range: 0 to 85c ? software information is contained in document m68hc11rm/ad mc144110 and mc144111 digital-to-analog converters with serial interface cmos lsi contents 1 introduction . . . . . . . . . . . . . . . . . . . . . . . 3-45 2 electrical specifications . . . . . . . . . . . . . 3-48 3 switching characteristics . . . . . . . . . . . . 3-49 4 pin descriptions . . . . . . . . . . . . . . . . . . . . 3-52 5 packaging . . . . . . . . . . . . . . . . . . . . . . . . . 3-54 freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
freescale semiconductor 3-46 wireless rf product device data mc144110 introduction figure 1. block diagram v dd 2r r 2r 2r 2r 2r 2r 2r r rrr q1 out r1 out rn out qn out hex buffer (inverting) hex latch c 6-bit shift register c d c d * q d out enb clk d in * transparent latch
introduction freescale semiconductor wireless rf product device data 3-47 mc144110 figure 2. pin assignments mc144110p mc144110dw mc144111p MC144111DW nc = no connection d in q1 out r1 out q2 out r2 out q3 out r3 out enb v ss v dd r6 out q6 out r5 out q5 out r4 out q4 out d out clk 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 d in q1 out r1 out q2 out r2 out q3 out r3 out enb v ss v dd r6 out q6 out r5 out q5 out r4 out q4 out d out clk 1 2 3 4 5 6 7 8 9 20 19 18 17 16 15 14 13 12 10 nc 11 nc d in q1 out r1 out q2 out r2 out q3 out r3 out enb v ss v dd r4 out q4 out d out clk 1 2 3 4 5 6 7 14 13 12 11 10 9 8 d in q1 out r1 out q2 out r2 out q3 out r3 out enb v ss v dd r4 out q4 out d out clk 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 nc nc
freescale semiconductor 3-48 wireless rf product device data mc144110 electrical specifications 2 electrical specifications this device contains protection circuitry to guard agai nst damage due to high stat ic voltages or electric fields; however, it is advised that precautions be taken to avoid application of voltage higher than maximum rated voltages to this hi gh-impedance circuit. for proper ope ration it is recommended that v in and v out be constrained to the range v ss (v in or v out ) v dd . unused inputs must always be tied to an appropriate logic voltage level (e.g., either v ss or v dd ). table 1. maximum ratings (voltages referenced to v ss ) ratings symbol value unit dc supply voltage v dd - 0.5 to + 18 v input voltage, all inputs v in - 0.5 to v dd + 0.5 v dc input current, per pin i 10 ma power dissipation (per output) t a = 70 c mc144110 mc144111 t a = 85 c mc144110 mc144111 p oh 30 50 10 20 mw power dissipation (per package) t a = 70 c mc144110 mc144111 t a = 85 c mc144110 mc144111 p d 100 150 25 50 mw storage temperature range t stg - 65 to + 150 c table 2. electrical characteristics (voltages referenced to v ss , t a = 0 to 85 c unless otherwise indicated) symbol parameter test conditions v dd min max unit v ih high-level input voltage (d in , enb , clk) 5 10 15 3.0 3.5 4 - - - v v il low-level input voltage (d in , enb , clk) 5 10 15 - - - 0.8 0.8 0.8 v i oh high-level output current (d out )v out = v dd - 0.5 v 5 - 200 - a i ol low-level output current (d out )v out = 0.5 v 5 200 - a i dd quiescent supply current mc144110 mc144111 i out = 0 a15 15 - - 12 8 ma i in input leakage current (d in , enb , clk) v in = v dd or 0 v 15 - 1 a v nonl nonlinearity voltage (rn out) see figure 3 5 10 15 - - - 100 200 300 mv
switching characteristics freescale semiconductor wireless rf product device data 3-49 mc144110 3 switching characteristics v step step size (rn out) see figure 4 5 10 15 19 39 58 137 274 411 mv v offset offset voltage from v ss d in = $00, see figure 3 - - 1 lsb i e emitter leakage current v rn out = 0 v 15 - 10 a h fe dc current gain i e = 0.1 to 10.0 ma t a = 25 c -40-- v be base-to-emitter voltage drop i e = 1.0 ma - 0.4 0.7 v table 3. switching characteristics (voltages referenced to v ss , t a = 0 to 85c, c l = 50 pf, input t r = t f = 20 ns unless otherwise indicated) symbol parameter v dd min max unit t wh positive pulse width, clk (figures 5 and 6) 5 10 15 2 1.5 1 - - - s t wl negative pulse width, clk (figure 5 and 6) 5 10 15 5 3.5 2 - - - s t su setup time, enb to clk (figures 5 and 6) 5 10 15 5 3.5 2 - - - s t su setup time, d in to clk (figures 5 and 6) 5 10 15 1000 750 500 - - - ns t h hold time, clk to enb (figures 5 and 6) 5 10 15 5 3.5 2 - - - s t h hold time, clk to d in (figures 5 and 6) 5 10 15 5 3.5 2 - - - s t r , t f input rise and fall times 5 - 15 - 2 s c in input capacitance 5 - 15 - 7.5 pf table 2. electrical characteristics (continued) (voltages referenced to v ss , t a = 0 to 85 c unless otherwise indicated) symbol parameter test conditions v dd min max unit
freescale semiconductor 3-50 wireless rf product device data mc144110 switching characteristics figure 3. d/a transfer function figure 4. definition of step size linearity error (integral linearity) . a measure of how straight a device's transfer function is, it i ndicates the worst-case deviation of linearity of the actual transfer functi on from the best-fit straight line. it is normally specified in parts of an lsb. output voltage @ rn out, % (v dd - v ss ) program step 0 25 75 100 50 015314763 $00 $0f $1f $2f $3f v offset ideal v nonl ideal actual v rn out step size digital number step size v dd 64 ----------- -0.75 v dd 64 ----------- - = (for any adjacent pair of digital numbers)
switching characteristics freescale semiconductor wireless rf product device data 3-51 mc144110 figure 5. serial input, positive clock figure 6. serial input, negative clock table 4. number of channels vs clocks required number of channels required number of clock cycles outputs used on mc144110 outputs used on mc144111 1 6 q1/r1 q1/r1 2 12 q1/r1, q2/r2 q1/r1, q2/r2 3 18 q1/r1, q2/r2, q3/r 3 q1/r1, q2/r2, q3/r3 4 24 q1/r1, q2/r2, q3/r3, q4/r 4 q1/r1, q2/r2, q3/r3, q4/r4 5 30 q1/r1, q2/r2, q3/r3, q4/r4, q5/r5 not applicable 6 36 q1/r1, q2/r2, q3/r3, q4/r4, q5/r5, q6/r6 not applicable enb clk d in 50% t su t h t wl 50% t wh c 1 c 2 c n d 1 d 2 d n t su t h enb clk d in t wl t wh c 1 c 2 c n d 1 d 2 d n t h t su t su t h
freescale semiconductor 3-52 wireless rf product device data mc144110 pin descriptions 4 pin descriptions 4.1 inputs d in data input six-bit words are entered serially, ms b first, into digital data input, d in . six words are loaded into the mc144110 during each d/a cycle; four wo rds are loaded into the mc144111. the last 6-bit word shifted in determines the output leve l of pins q1 out and r1 ou t. the next-to-last 6-bit word affects pins q2 out and r2 out, etc. enb negative logic enable the enb pin must be low (active) during the serial load. on the low-to-high transition of enb , data contained in the shift register is loaded into the latch. clk shift register clock data is shifted into the register on the high-to-low transition of clk. clk is fed into the d-input of a transparent latch, which is used for inhibiti ng the clocking of the shift register when enb is high. the number of clock cycles required for the mc 144110 is usually 36. the mc144111 usually uses 24 cycles. see table 4 for additional information. 4.2 outputs d out data output the digital data output is pr imarily used for cascading the dacs and may be fed into d in of the next stage. r1 out through rn out resistor network outputs these are the r-2r resistor netw ork outputs. these outputs may be fed to high-impedance input fet op amps to bypass the on-chip bipolar tr ansistors. the r value of the resi stor network ranges from 7 to 15 k ? .
pin descriptions freescale semiconductor wireless rf product device data 3-53 mc144110 q1 out through qn out npn transistor outputs buffered dac outputs utilize an emitter-follower configuration fo r current-gain, thereby allowing interface to low-impedance circuits. 4.3 supply pins v ss negative supply voltage this pin is usually ground. v dd positive supply voltage the voltage applied to this pin is used to s cale the analog output swing from 4.5 to 15 v p-p.
freescale semiconductor 3-54 wireless rf product device data mc144110 packaging 5 packaging figure 7. outline dimensions for p suffix, plastic dip ( case 707-02, issue c) figure 8. outline dimensions for dw suffix, sog (case 751d-06, issue h) 1 seating plane 10 9 1 8 m a b k c n f g d h j l dim min max min max millimeters inches a 22.22 23.24 0.875 0.915 b 6.10 6.60 0.240 0.260 c 3.56 4.57 0.140 0.180 d 0.36 0.56 0.014 0.022 f 1.27 1.78 0.050 0.070 g 2.54 bsc 0.100 bsc h 1.02 1.52 0.040 0.060 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m 0? 15? 0? 15? n 0.51 1.02 0.020 0.040 notes: 1. 2. 3. 4. positional tolerance of leads (d). shall be within 0.25 (0.010) at maximum material condition, in relation to seating plane and each other. dimension l to center of leads when formed parallel. dimension b does not include mold flash. controlling dimension: inch. 20 11 10 1 pin number pin 1 index 10x 7.6 7.4 12.95 12.65 0.25 0.10 2.65 2.35 10.55 10.05 5 4 6 b t a m 0.25 b 20x seating plane 0.1 t m 0.25 t a b 20x 1 8 x 0.49 0.35 1.27 0.75 0.25 aa 0.32 0.23 1.0 0.4 7? 0? x45? notes: 1. 2. 3. 4. 5. 6. dimensions are in millimeters. dimensioning and tolerancing per asme y14.5m, 1994. datums a and b to be determined at the plane where the bottom of the leads exit the plastic body. this dimension does not include mold flash, protrusion or gate burrs. mold flash, protrusion or gate burrs shall not exceed 0.15mm per side. this dimension is determined at the plane where the bottom of the leads exit the plastic body. this dimension does not include inter-lead flash or protrusions. inter-lead flash and protrusions shall not exceed 0.25mm per side. this dimension is determined at the plane where the bottom of the leads exit the plastic body. this dimension does not include dambar protrusion. allowable dambar protrusion shall not cause width to exceed 0.62mm. section a-a
packaging freescale semiconductor wireless rf product device data 3-55 mc144110 figure 9. outline dimensions for p suffix, plastic dip (case 646-07, issue p) figure 10. outline dimensions for dw suffix, sog (case 751g-04, issue d) 17 14 8 b a dim min max inches a 0.715 0.770 b 0.240 0.260 c 0.145 0.185 d 0.015 0.021 f 0.040 0.070 g 0.100 bsc h 0.052 0.0 9 5 j 0.008 0.015 k 0.115 0.135 l m --- 10? n 0.015 0.040 0.2 9 0 0.310 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1 99 4. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. 6. 646-06 obsolete, new standard 646-07. f hg d 14 pl k c seating plane n -t- m (0.005) l m j notes: 1. 2. 3. 4. 5. 6. dimensions are in millimeters. dimensioning and tolerancing per asme y14.5m, 1994. datums a and b to be determined at the plane where the bottom of the leads exit the plastic body. this dimension does not include mold flash, protrusion or gate burrs. mold flash, protrusion or gate burrs shall not exceed 0.15mm per side. this dimension is determined at the plane where the bottom of the leads exit the plastic body. this dimension does not include inter-lead flash or protrusions. inter-lead flash and protrusions shall not exceed 0.25mm per side. this dimension is determined at the plane where the bottom of the leads exit the plastic body. this dimension does not include dambar protrusion. allowable dambar protrusion shall not cause the lead width to exceed 0.62mm. seating plane 0.49 16x b m 0.25 a t 0.35 2.65 2.35 0.25 0.10 6 t 16x 0.1 t 1.27 14x 8 9 1 16 8 x 10.55 10.05 m 0.25 b 4 10.45 10.15 a 7.6 7.4 b pin 1 index pin's number 5 a a 0.75 x45 ? 0.25 7? 1.0 0.4 0? 0.32 0.23 section a-a

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